|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET DESCRIPTION Monolithic overload protected logic level power MOSFET in a surface mount plastic envelope, intended as a general purpose switch for automotive systems and other applications. BUK113-50DL QUICK REFERENCE DATA SYMBOL VDS ID PD Tj RDS(ON) PARAMETER Continuous drain source voltage Drain current limiting Total power dissipation Continuous junction temperature Drain-source on-state resistance MIN. 4 MAX. UNIT 50 8 4 150 200 V A W C m APPLICATIONS General controller for driving lamps small motors solenoids FEATURES Vertical power DMOS output stage Overload protected up to 125C ambient Overload protection by current limiting and overtemperature sensing Latched overload protection reset by input 5 V logic compatible input level Control of power MOSFET and supply of overload protection circuits derived from input Low operating input current permits direct drive by micro-controller ESD protection on all pins Overvoltage clamping for turn off of inductive loads FUNCTIONAL BLOCK DIAGRAM DRAIN O/V CLAMP INPUT RIG POWER MOSFET LOGIC AND PROTECTION SOURCE Fig.1. Elements of the TOPFET. PINNING - SOT223 PIN 1 2 3 4 input drain source drain (tab) DESCRIPTION PIN CONFIGURATION 4 SYMBOL D TOPFET I P 1 2 3 S January 1996 1 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS ID II IIRM PD Tstg Tj PARAMETER Continuous drain source voltage Continuous drain current2 Continuous input current Non-repetitive peak input current Total power dissipation Storage temperature Continuous junction temperature 1 BUK113-50DL CONDITIONS clamping tp 1 ms Tsp = 90 C normal operation MIN. -55 - MAX. 50 self limiting 3 10 4 150 150 UNIT V A mA mA W C C ESD LIMITING VALUE SYMBOL VC PARAMETER Electrostatic discharge capacitor voltage CONDITIONS Human body model; C = 250 pF; R = 1.5 k MIN. MAX. 2 UNIT kV OVERVOLTAGE CLAMPING LIMITING VALUES At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients. SYMBOL EDSM EDRM PARAMETER Non-repetitive clamping energy Repetitive clamping energy CONDITIONS Tb 25 C; IDM < ID(lim); inductive load Tb 75 C; IDM = 50 mA; f = 250 Hz MIN. MAX. 100 4 UNIT mJ mJ OVERLOAD PROTECTION LIMITING VALUES With the protection supply provided via the input pin, TOPFET can protect itself from short circuit loads. Overload protection operates by means of drain current limiting and activating the overtemperature protection. SYMBOL VISP VDDP PARAMETER CONDITIONS MIN. 4 MAX. 35 UNIT V V Protection supply voltage3 for valid protection Protected drain source supply voltage VIS = 5 V THERMAL CHARACTERISTICS SYMBOL PARAMETER Thermal resistance Rth j-sp Rth j-a Junction to solder point Application information Junction to ambient on PCB of fig. 3 on minimum footprint PCB 70 100 K/W K/W measured to pin 4 solder point 12 15 K/W CONDITIONS MIN. TYP. MAX. UNIT 1 Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy. 2 Refer to OVERLOAD PROTECTION CHARACTERISTICS. 3 The input voltage for which the overload protection circuits are functional. January 1996 2 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET OVERLOAD PROTECTION CHARACTERISTICS TOPFET switches off to protect itself when there is an overload fault condition. It remains latched off until reset by the input. SYMBOL ID(lim) EDS(TO) Tj(TO) PARAMETER Overload protection Drain current limiting Short circuit load protection Overload threshold energy Overtemperature protection Threshold junction temperature VIS = 5 V 150 VDD = 13 V; VIS = 5 V VIS = 5 V 4 CONDITIONS MIN. BUK113-50DL TYP. 6 MAX. 8 - UNIT A J C tbf 165 STATIC CHARACTERISTICS Tb = 25 C unless otherwise specified SYMBOL V(CL)DSS V(CL)DSS IDSS IDSS IDSS RDS(ON) PARAMETER Drain-source clamping voltage Drain-source clamping voltage Off-state drain current Off-state drain current Off-state drain current Drain-source on-state resistance1 CONDITIONS VIS = 0 V; ID = 10 mA VIS = 0 V; IDM = 200 mA; tp 300 s; 0.01 VDS = 45 V; VIS = 0 V VDS = 50 V; VIS = 0 V VDS = 40 V; VIS = 0 V; Tj = 100 C VIS = 5 V; IDM = 1 A; tp 300 s; 0.01 MIN. 50 TYP. 55 56 0.5 1 10 150 MAX. 70 2 20 100 200 UNIT V V A A A m INPUT CHARACTERISTICS Tb = 25 C unless otherwise specified. The supply for the logic and overload protection is taken from the input. SYMBOL VIS(TO) IIS IISL VISR V(CL)IS RIG PARAMETER Input threshold voltage Input supply current Input supply current Protection latch reset voltage2 Input clamping voltage Input series resistance CONDITIONS VDS = 5 V; ID = 1 mA normal operation; protection latched; VIS = 5 V VIS = 4 V VIS = 5 V VIS = 3.5 V MIN. 1.7 1 6 TYP. 2.2 330 170 500 250 2.2 7.5 33 MAX. 2.7 450 270 650 400 3.5 UNIT V A A A A V V k II = 1.5 mA to gate of power MOSFET SHADED BOXES Values shown within shaded boxes are estimated for the objective specification. These will not be fixed until the evaluation of prototype samples. 1 Continuous input voltage. The specified pulse width is for the drain current. 2 The input voltage below which the overload protection circuits will be reset. January 1996 3 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET MOUNTING INSTRUCTIONS Dimensions in mm. 3.8 min BUK113-50DL PRINTED CIRCUIT BOARD Dimensions in mm. 36 1.5 min 18 60 9 2.3 1.5 min (3x) 6.3 4.6 4.5 10 1.5 min 4.6 7 15 50 Fig.2. Soldering pattern for surface mounting. Fig.3. PCB for thermal resistance and power rating. PCB: FR4 epoxy glass (1.6 mm thick), copper laminate (35 m thick). January 1996 4 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET MECHANICAL DATA Dimensions in mm Net Mass: 0.11 g handbook, full pagewidth BUK113-50DL 0.95 0.85 S seating plane 6.7 6.3 3.1 2.9 0.1 S 0.32 0.24 B 0.2 M A 4 A 0.10 0.01 3.7 3.3 o 7.3 6.7 16 o max 16 1 1.80 max 10 o max 2 0.80 0.60 4.6 3 2.3 0.1 M B (4x) MSA035 - 1 Fig.4. SOT223 surface mounting package1. 1 For further information, refer to surface mounting instructions for SOT223 envelope. Epoxy meets UL94 V0 at 1/8". January 1996 5 Rev 1.000 Philips Semiconductors Objective specification PowerMOS transistor Logic level TOPFET DEFINITIONS Data sheet status Objective specification Product specification Limiting values BUK113-50DL This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1996 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. January 1996 6 Rev 1.000 |
Price & Availability of BUK113-50DL |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |